TSMC wants to remain No. 1 in chips: A14, A13, A12 nodes from 2028

Taiwan Semiconductor Manufacturing Company (TSMC) has once again provided an outlook on its plans for the introduction of further shrinking chip structures. The aim is to get closer and closer to the 1-nanometer limit by 2029.

TSMC is right on schedule with A14 node

On the occasion of the announcement of its latest business figures, the world’s largest contract manufacturer of semiconductor products, TSMC, also gave an outlook on how chips will continue to shrink thanks to new manufacturing technologies in a telephone call with press representatives. During the conversation with analysts and press representatives, TSMC boss CC Wei explained that due to the increasingly complex process technologies in the production of state-of-the-art chips, it is now taking longer and longer to bring mass production capacities to a high level. Five to seven years are now common, although there is no possibility of reaching the goal any faster.

Wei announced loudly Tech News Taiwan Announces the start of mass production in the A14 node at TSMC in 2028. What this means is that they then want to deliver chips with a structure width equivalent of 1.4 nanometers. Compared to the current N2 node, TSMC wants to offer 10 to 15 percent higher performance with the same energy consumption or a 25 to 30 percent reduction in power consumption with the same performance. The density of the structures on the chips should increase by almost 20 percent, it was said.

The TSMC boss made it clear that the development of the A14 node is currently progressing smoothly, with device performance of almost 90 percent currently being achieved in internal tests. TSMC wants to initiate so-called risk production as early as 2027 in order to provide its customers with the first samples of their new, “smaller” chips. Meanwhile, TSMC plans to introduce more advanced nodes, known as A13 and A12, in 2029.

The TSMC A13 node is intended to be a further variant of the A14 node, which further increases performance and energy efficiency through optimization of design and process technologies and, among other things, is intended to achieve a further reduction in the area occupied by chip structures by over six percent.

The TSMC A12 node, also planned for 2029, will integrate the so-called “Super Power Rail” technology in conjunction with the A14 node in order to further increase performance, energy consumption and the efficient use of chip area. The transistors are supplied with power via the back, which TSMC already wants to practice in its mass production of the A16 node starting in the fourth quarter of 2026.